Order Number DM54LSJ, DM54LSW, DM74LSWM or DM74LSN. See Package Number J20A, M20B, N20A or W20A 2. Download Fairchild Semiconductor DM74LSN pdf datasheet file. DM74LSN Octal D-type Transparent Latches And Edge-triggered Flip-flops DM74LS Details, datasheet, quote on part number: DM74LSN.

Author: Kigagor Gugal
Country: Sudan
Language: English (Spanish)
Genre: Finance
Published (Last): 8 March 2014
Pages: 375
PDF File Size: 5.82 Mb
ePub File Size: 18.73 Mb
ISBN: 777-5-14313-360-9
Downloads: 9517
Price: Free* [*Free Regsitration Required]
Uploader: Tygogul

If the signal is more positive than this level, the output will switch low and if more negative, it will switch high.

The schematic circuit was drawn using OrCAD software. The output of the comparator is open collector and is thus virtually isolated from the input terminals.

Manufacturers of the board were Precision Engineering Products Chesterton Ltd, who will retain the production artwork for a limited time. They are provided to facilitate board testing.

This power rail separation is to reduce power born noise. This was required due to dm74sl374n obsolescence of the comparators previously used. These capacitors are identified on dm74s374n data board and in the schematic as C through C This is a low noise dual switched integrator that has a built in precision pF capacitor for integration.

74LS Datasheet catalog

Secondly, the component pads adjacent to the ACF packages allow for the addition of a capacitor in parallel to the internal pF. These are wired back to back between the two ground levels. This comprises a 2M resistor package RA1A, and 0. Each comparator package is decoupled from both power rails by 10nF capacitors.

After testing the data boards out of the crate, it is important to put these switches back to the ‘Normal’ settings, as datashest in figure 2 below, before reinserting into the crate. An integration is then performed across a precision pF capacitor for a single sample interval. Test Switches There are vatasheet switches on the board selected by jumpers. This is made up of a network of tracks over the board. This is an octal D-type flip flop with tri-state outputs. Failure to do this could result in data bus contention.


The shielding is provided by the partial groundplane on the component side of the board. The file is in the same archive, under:. These boards were developed for use in Pulsar research. It is a modification to a previous design of The two unused controls are pulled high by resistors R1 and R2. This is to supplement an incomplete track. Nearby C, there are two diodes D1, and D2. There is a separate regulator for the digital Vcc, U These boards are controlled by one Control Board in the same crate.

This IC is a quad programmable comparator selected for its low and repeatable input offset voltages. The sign of the output of the integrator is detected by a comparator, the output of which is written onto one datasheeet of a 64 bit data register comprising a D-type latch.

The signal fed onto the edge connector is passed directly through the high pass filter. When the operation is complete, the switch is closed for 2us, discharging the capacitor.

There is considerable decoupling throughout the board. This would reduce the gain. The operation is identical for all 64 channels. To describe the operation dayasheet the circuit, channel 1 is used as an example.

54LS374 Datasheet PDF

The digitiser data board was designed, developed, fabricated and tested by the author. The signal is passed through a 0.


Before each integration commences, the switch is closed to discharge the integration capacitor, C2.

Following manufacturers’ guidelines, each ACF dm74ps374n is decoupled from both rails by 1. This documentation concerns the 64 channel Digitiser Data Boards designed in A 27k resistor R5 is in series with the output of the comparator to protect the input of the following stage, since the comparator output switches down to the V rail.

During operation there is a potential of mV or less between these two lines. Dm744ls374n function of this filter is to block DC signals and to control the overall sensitivity of the integrator.

This reads data from each board and writes the data to a computer interface along with a count word. All digital grounds are linked to this plane. Refer to the complete schematic diagram at the end of this section. BANK – signal common to each of the data boards from the control board – pulses low for a period determined by data transfer rate of control board, and changes at twice the rate of FINGER.

Full circuit details and user instructions for the control board are in a separate document. The integration period is determined by the separate control board. The digital signal is finally staticized by U7, 74LS The works reference is:.

There are nine data boards in the crate supplied, thus allowing up to channels to be digitised. The typical current requirements are:.